Data decision circuit using clock signal which has phase...

Details Data decision circuit using clock signal which has phase... Data decision circuit using clock signal which has phase...

2006-06-27

2006-06-27

Burd, Kevin (Department: 2631)

Pulse or digital communications

Synchronizers

Self-synchronizing signal

C375S326000, C375S376000

Reexamination Certificate

active

07068747

ABSTRACT:
In a data decision circuit: a clock generation unit generates a clock signal based on a phase difference signal so that the clock signal has an optimum phase with respect to a phase of an input data signal; a data determination unit determines data values carried by the input data signal, by using the clock signal; a phase-difference detection unit detects a rising-side phase difference and a falling-side phase difference, where the rising-side phase difference is a phase difference between a rising of the input data signal and a next transition in the clock signal, and the falling-side phase difference is a phase difference between the transition and a next falling of the input data signal; and a phase-difference-signal generation unit generates the phase difference signal so as to represent a difference between the rising-side phase difference and the falling-side phase difference.

REFERENCES:
patent: 4371974 (1983-02-01), Dugan
patent: 5161173 (1992-11-01), Nordby
patent: 6028898 (2000-02-01), Sparks et al.
patent: 6778102 (2004-08-01), Grunnet-Jepsen et al.
patent: 2000068991 (2000-03-01), None
patent: 2004048721 (2002-05-01), None

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