Data correction circuit for position emission computed tomograph

Details Data correction circuit for position emission computed tomograph Data correction circuit for position emission computed tomograph

1988-05-27

1990-06-05

Lall, Parshotam S.

Boots, shoes, and leggings

36457101, 36441315, 36441313, G06F 1574, G06F 1542

Patent

active

049319680

ABSTRACT:
A data correction circuit having arithmetic units installed in a data bus for the purpose of carrying out corrections such as dead-time correction and decay correction. The data correction circuit also includes an address modification storage installed in an address bus for the purpose of changing raw data into a sinogram. As the size of memory matrices for positron ECT grows larger in recent years, software dependent on a CPU is apt to require more time for data processing and prevent image formation from taking place in real-time. The aim of the present invention is to allow data reduction and correction to be carried out in real-time.

REFERENCES:
patent: 4473749 (1984-09-01), Derenzo et al.
patent: 4511980 (1985-04-01), Watanabe
patent: 4523091 (1985-06-01), Persyk
patent: 4575868 (1986-03-01), Ueda et al.

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