Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1990-08-14
1993-12-28
Coles, Sr., Edward L.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
H04N 140
Patent
active
052744701
ABSTRACT:
A data converter is provided with arranged in a parallel manner such that each has a storage capacity for plurality of bits. A counter counts clock pulses and supplies a signal representing the counting results to a decoder, which in turn supplies loading pulses to respective shift registers. The shift registers received in a parallel manner a plurality of serial bit data in response to the loading pulses and internally transfer the storage contents bit by bit in response to transfer signals, so that the data read from the shift registers are outputted through an output control gate.
REFERENCES:
patent: 4240117 (1980-12-01), Wellendorf et al.
patent: 4296441 (1981-10-01), Ogasawara
patent: 4398221 (1983-08-01), Yamaguchi
patent: 4422153 (1983-12-01), Arai et al.
patent: 4467348 (1984-08-01), Fujii
Bluethman; Output of Non-Coded Information in Vertical Scanning; Feb. 1979; vol. 21, No. 9; pp. 3473-3478, IBM Technical Disclosure Bulletin.
Karita Toshiaki
Masuda Ichizo
Coles Sr. Edward L.
Grant II Jerome
Sharp Kabushiki Kaisha
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