Boots – shoes – and leggings
Patent
1980-11-03
1983-10-04
Chan, Eddie P.
Boots, shoes, and leggings
377 54, 377 77, G06F 304
Patent
active
044082720
ABSTRACT:
A data control circuit (18) for an input/output arrangement is arranged for controlling the transfer of a data word through a shift register (20 or 120) to or from a peripheral device (22 or 122). The circuit (18) provides for selection between internal clock generation at one of several rates or application of an external clock and for selection of the length and format of the data words to be transferred. Selection is accomplished by an interval counter (38), format data stored in a control register (37), two gating circuits (30 and 40) and a selection circuit (35).
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ISSCC '80-Proceedings, 2/13/80, "A Digital Signal Processor for Telecommunications Applications", pp. 44-45.
ICASSP '80-Proceedings, vol. 1 of 3, "An LSI Digital Signal Processor", pp. 383-385, 4/9/80.
ICC '80-Proceedings, vol. 1 of 3, May 1980 "An Integrated Digital Signal Processor", pp. 11.1.1-11.1.5.
ICCC '80-Proceedings, vol. 2 of 2, Oct. 1, 1980, "Logic and Fault Simulations of the DSP, A VLSI Digital Signal Processor", pp. 948-952.
Bell Telephone Laboratories Incorporated
Chan Eddie P.
Havill Richard B.
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