Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
1998-08-31
2001-02-20
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C709S253000, C709S249000, C326S068000
Reexamination Certificate
active
06191634
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an interface apparatus for data communications between a high-power device and a low-power device, and a data communications system using the interface apparatus.
2. Description of the Related Art
U.S. Pat. No. 5,504,864 discloses the structure for data communications between a high-power device such as a desktop computer (desktop PC) and a low-power device such as a hand-held computer (hand-held PC) via pins
2
and
3
in RS-232C connectors.
FIG. 4
illustrates connecting a desktop PC
102
to a hand-held PC
104
via a communications interface apparatus
100
having a cable
110
and connectors
112
,
114
in accordance with a data transmitting system disclosed in U.S. Pat. No. 5,504,864. Reference numerals
106
and
108
respectively denote serial ports of the desktop PC
102
and the hand-held PC
104
. A level conversion circuit
116
is housed in the connector
114
that enables voltage level conversion between the desktop PC
102
and the hand-held PC
104
.
FIG. 5
is a circuit diagram of the communications interface apparatus
100
. To transfer data from the desktop PC
102
to the hand-held PC
104
, the level conversion circuit
116
includes an NPN transistor Q
1
with its base being connected to a TxD pin of the connector
112
through a resistor R
1
as well as to a ground pin GND of the connector
112
through a resistor R
2
.
The collector of the transistor Q
1
is connected to a receive contact RX on the connector
114
. The emitter of the transistor Q
1
is connected to the ground GND on the connector
112
through a resistor R
3
and is directly connected to a ground pin GND on the connector
114
.
To transfer data from the hand-held PC
104
to the desktop PC
102
, the level conversion circuit
116
comprises a field-effect transistor (FET) Q
2
, a zener diode D
1
and a resistor R
5
. A receive contact RxD of the connector
112
is connected to a negative voltage source RTS (−12 volts) through the resistor. The gate of the FET Q
2
is connected to a transmit contact TX of the connector
114
through a resistor R
6
and to the ground pin GND on the connector
112
through a zener diode D
2
.
The anode of the diode D
1
is directly connected to the ground pin GND of the connector
112
, and to the ground pin GND of the connector
114
through the resistor R
3
. The cathode of the diode D
2
is connected to the gate of the transistor Q
2
. The drain of the transistor Q
2
is connected to a receive contact RxD of the connector
112
through a resistor R
7
.
A level converting operation for data transmission from the desktop PC
102
to the hand-held PC
104
via the cable
110
will now be described.
The receive contact RX on the connector
114
is kept high (
5
volts) internally by the hand-held PC
104
. The TxD line of the connector
112
is low and the transistor Q
1
is in an off state when the desktop PC
102
is sending a logical zero (−12 volts). In this instance, transistor Q
1
is an “open-collector,” and thus has no effect on the receive contact RX of the connector
114
, that is, the voltage at the receive contact RX is kept at
5
volts.
Conversely, when a logical one (+12 volts) is being transmitted from the desktop PC
102
, the TxD line becomes high and turning transistor Q
1
“on”, thus, pulling the receive contact RX on the connector
112
to the ground GND (0 volt).
The level conversion for data transmission from the hand-held PC
104
to the desktop PC
102
via the cable
110
will now be described.
The diode D
1
sets the threshold for turning Q
2
on and off by clamping he positive voltage source DTR (+12 volts) of the connector
112
to approximately 5.1 volts. The potential at the gate of the FET Q
2
will be around 3-5 volts, and the FET Q
2
will be in an off state when the transmit contact TX of the connector
114
is high (+5 volts). Thus, there is no current flowing between the source and drain, and the receive contact RxD of the connector
112
will continue to be pulled low (−12 volts) by the negative voltage source RTS (−12 volts) of the connector
112
.
When the transmit contact TX of the connector
114
goes low (0 volt), the FET Q
2
turns on, and the receive contact RxD of the connector
112
is connected to the clamped positive voltage source DTR (+12 volts), pulling RxD to a high state.
The level conversion circuit of the above conventional communications interface apparatus, however, has a large circuitry because it requires the zener diodes and the like. The circuit is powered by the high-power device, therefore, those diodes are necessary for pulling (clamping) the supplied relatively high voltage to a predetermined low voltage corresponding to the low-power device by lowering the threshold for switching the gate of the FET. The clamping by the diodes is necessary for correct switching of the FET in accordance with a signal from the low-power device.
Moreover, the cable needs a large connector because the level conversion circuit is housed in the connector. Such the a cable, moreover, has a high manufacturing cost and is inconvenient for handling.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above. It is an object of the present invention to provide a data communications system and a data communications interface apparatus having a smaller conversion circuit and connector with and a reduce manufacturing cost.
To accomplish the above object, a data communications interface apparatus connects a high-power device and a low-power device with a cable. The low-power device has its own incorporated signal level conversion circuit which is powered by the low-power device.
The signal level conversion circuit has a first element. The first element is turned on when it receives a low level signal (0 volt) from the low-power device and is turned off when it receives a high level signal (5 volts).
The low-power device supplies a signal having a voltage corresponding to the low-power device (5 volts) to the high power device by applying a current thereto through the turned-on first switching element.
When the first switching element is turned off, a voltage pulled down to negative voltage level (−12 volts) is supplied to the high-power device through an open-circuit between the first switching element and the high-power device.
The signal level conversion circuit further comprises a second switching element. The second switching element is turned on when it receives a signal having one level (+12 volts) from the high-power device, and is turned off when receiving a signal having the other level (−12 volts).
A ground level signal (0 volt) is supplied to the low-power device by applying a current between the low-power device and the ground through the turned-on second switching element.
When the second switching element is turned off, a voltage which is pulled up so as to correspond to voltage level of the low-power device (5 volts) is supplied to the low-power device through an open-circuit between the second switching element and the low-power device.
The level conversion circuit according to the present invention is incorporated in the low-power device and powered thereby with a low voltage. Therefore, the level conversion circuit does not require elements such as a zener diode. Those elements are required in a conventional apparatus for pulling (clamping) a voltage of the high-power device to a predetermined lower voltage by lowering the gate threshold for correct switching in accordance with a signal from the low-power device. Such exclusion of the diodes realizes miniaturization of the level conversion circuit and reduces the manufacturing cost.
The present invention can also miniaturize a connector because the connector needs no circuits or substrates housed therein. And this also causes the reduction of the manufacturing cost.
REFERENCES:
patent: 5157769 (1992-10-01), Eppley et al.
patent: 5504864 (1996-04-01), Berg
Casio Computer Co. Ltd.
Frishauf, Holtz Goodman, Langer & Chick, P.C.
Lam Tuan T.
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