Data communications subsystem

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G06F 300

Patent

active

041569075

ABSTRACT:
A data communications subsystem operates with a main host computer having a central processor and main memory. The subsystem comprises: A data communications processor having its own internal memory for storing data transfer routines; and autonomous memory dedicated to storing data transfer instructions and control data; and a basic control module which includes a basic control interface unit connecting a plurality of front-end controllers. The basic control interface unit provides memory access paths for the front-end controllers to access data communications memory resources. The data communications processor provides address pointers to each of the front-end controllers whereby the selected front-end controller may access data transfer instructions from a data communications memory resource and then execute these instructions. The data transfer instructions are stored in "command blocks" in a memory resource and are made accessible to the front-end controllers for execution of data transfer operations. In a "non-autonomous configuration" the host system main memory is used for storage of command blocks and control data. This configuration is used with the type of front-end controllers known as broadband controllers using high speed transmission lines connected to peripherals and adapter cluster module controllers. In an "autonomous" configuration, the command blocks are stored in autonomous memory and the front-end controllers may include, in addition, an added mix of a data communications disk controller (DCDC) for data storage on disk, and a store-to-store controller (SSC) for transfer of data between autonomous memory and the main memory independently of the data communications processor.

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