Electrical computers and digital processing systems: multicomput – Ring computer networking
Reexamination Certificate
2006-12-26
2006-12-26
Tran, Philip B. (Department: 2155)
Electrical computers and digital processing systems: multicomput
Ring computer networking
C709S213000, C709S214000, C711S148000
Reexamination Certificate
active
07155540
ABSTRACT:
N shared data registers are provided for N+1 processors, respectively. For allowing all the processors to read the same data from the shared data registers, the processors are connected by interprocessor communication channels. The processors are classified into a master processor and subordinate processors. All data writing into the shared data registers are executed from the master processor. Further, data writing into the shared data registers from the subordinate processor is executed from the master processor after a write request is sent to the master processor.
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Kisaburo Nakazawa, Computer Architecture and Configuration of the Same:, Asakura Bookstore, Nov. 1995, pp. 388-389.
Nakamura Tomohiro
Sukegawa Naonobu
A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Hitachi , Ltd.
Reed Smith LLP
Tran Philip B.
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