Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2008-01-15
2008-01-15
Fan, Chieh M. (Department: 2611)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
C375S333000, C375S360000
Reexamination Certificate
active
10270693
ABSTRACT:
The present invention provides a data communication method and a data communication device capable of performing high-speed data communication by using a parallel link and higher-speed data communication by reducing a timing skew. A data communication method includes: a step of encoding data of N bits (N being 2 or larger) to transmission data of M bits (M being 3 or larger) on a transmission side; a step of generating a transmission signal in which transition takes place in at least one level of any of the transmission data synchronously with a transmission clock and transmitting the transmission signal to a transmission line on the transmission side; a step of recognizing transition in the signal of M bits received via the transmission line and detecting the reception data of M bits synchronized with the transmission clock on a reception side; and a step of decoding the reception data of M bits to the data of N bits.
REFERENCES:
patent: 5012467 (1991-04-01), Crane
patent: 5278902 (1994-01-01), Nugent
patent: 5408501 (1995-04-01), Cornaby
patent: 5491713 (1996-02-01), Kwok et al.
patent: 5598442 (1997-01-01), Gregg et al.
patent: 6021011 (2000-02-01), Behrens et al.
patent: 6222893 (2001-04-01), Someya
patent: 6362757 (2002-03-01), Lee et al.
patent: 6463092 (2002-10-01), Kim et al.
patent: 6763477 (2004-07-01), McGee
patent: 6959058 (2005-10-01), Yoo et al.
patent: 2002/0008682 (2002-01-01), Park
patent: 5-114924 (1993-05-01), None
patent: 8-508623 (1996-09-01), None
patent: 11-308281 (1999-11-01), None
Kitayama, Hiroyuki, “IEEE 1394 Architecture (Details on the physical layer, serial bus management, and protocol)”,Interface, Jul. 1999, pp. 58-67 (with English translation).
JEDEC Standard JESD79, “Double Data Rate (DDR) SDRAM Specification”, Jun. 2000, pp. 1-72.
Okuda Yuichi
Sakata Takeshi
Sato Takashi
Aghdam Freshteh N.
Fan Chieh M.
Miles & Stockbridge P.C.
LandOfFree
Data communication method and data communication device and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data communication method and data communication device and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data communication method and data communication device and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3913592