Multiplex communications – Wide area network – Packet switching
Patent
1985-12-04
1987-10-27
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
370 94, H04Q 1104, H04J 324
Patent
active
047034750
ABSTRACT:
A multi-link interprocessor communication protocol that allows a pair of processors to increase the speed of their communication by using multiple physical links in parallel. When a message is sent from one processor to another, the message is packetized into smaller segments and loaded onto the available physical links according to a simple algorithm. The individual packets are received at the other end, their accurate transmission verified, and the received packets are then reassembled in the proper order. Packets of one or more messages to the same destination can go over the same physical link, or over different physical links; that is, there is no association of any message to any particular physical communication link. Packets received out of order on a per logical channel basis are stored until a correct sequence of packets is received after which their transmission to the message destination is effected. The reordering of packets is accomplished using a multi-link header advantageously comprising only a single byte.
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patent: 4569042 (1986-02-01), Larson
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CCITT Recommendation X.25 (1984) "Interface Between Data Terminal Equipment (DTE) and Data Circuit-Terminating Equipment (DCE) for Terminals Operating in the Packer Mode on Public Data Networks", See Section 2.5, pp. 39-49.
CCITT Recommendation X.75 (1984) "Terminal and Transmit Call Control Procedures and Data Transfer System on International Circuits Between Packet-Switched Data Networks", See Section 2.5, pp. 164-176.
A. S. Tanenbaum, "Virtual Circuits And Datagrams", Computer Networks, Prentice-Hall, Inc., 1981, See Section 5.1, pp. 187-196.
Dretzka Ellen E.
Quan Zoe S.
Schreiner Philip A.
American Telephone and Telegraph Company AT&T Bell Laboratories
Olms Douglas W.
Scutch III Frank M.
Watland Ross T.
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