Boots – shoes – and leggings
Patent
1991-10-03
1995-02-21
Gossage, Glenn
Boots, shoes, and leggings
395325, 395200, 364DIG1, 370 941, 370 859, 370 60, G06F 1200, G06F 1300, H04J 324
Patent
active
053924126
ABSTRACT:
A data communication controller having a memory access control unit characterized by a symmetrical access port architecture. The memory access control unit allows both a host processor and the medium access control (MAC) unit of the data communication controller to transparently access a single-port data packet buffer memory while operating at full specified operating speed and without interference between simultaneous memory access requests. The memory access control unit arbitrates asynchronous memory access requests from both the host processor and the medium access control unit, while permitting each of these processors unlimited access to the single-port buffer memory as if it alone had the full memory available to itself at all times. The above capabilities are achieved using automatic address incrementation and data-byte prefetching operations, without requiring the use of a port processor or additional internal data buses.
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patent: 5016248 (1991-05-01), Kudoh
patent: 5175732 (1992-12-01), Hendel et al.
patent: 5193149 (1993-03-01), Awiszio et al.
patent: 5210749 (1993-05-01), Firoozmand
Gossage Glenn
Standard Microsystems Corporation
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