Data communication bypass apparatus and method

Details Data communication bypass apparatus and method Data communication bypass apparatus and method

1989-05-12

1990-10-16

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 581, 370 16, H04J 308

Patent

active

049640950

ABSTRACT:
A low speed channel bypass apparatus is described for reprovisioning the time slot multiplexer associated with an add/drop multiplexer so as to insure that particular low speed channel(s) within a high speed channel are passed through the add/drop multiplexer via the time slot multiplexer when the operation of an associated network controller is determined to be faulty. The low speed channel bypass apparatus is particularly directed for use with a high speed channel conforming to the synchronous optical network communication standard (SONET). A watchdog timer is used to monitor the performance of the network controller. The watchdog timer when timed out not only prevents further operation of the network controller, but instructs an associated reprovisioning apparatus to instruct the time slot multiplexer to connect through selected channel(s) from the east high speed interface to the west high speed interface.

REFERENCES:
patent: 4716561 (1987-12-01), Angell et al.
patent: 4779261 (1988-10-01), Yamagishi et al.

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