Data communication arrangement with embedded matrix switch

Details Data communication arrangement with embedded matrix switch Data communication arrangement with embedded matrix switch

1988-08-03

1989-12-05

Orsino, Joseph A.

Multiplex communications

Wide area network

Packet switching

370 84, 370 851, H04Q 1104

Patent

active

048857416

ABSTRACT:
Modems, data service units, application modules and other data communication devices, installed in a common equipment cabinet, are interconnected by way of a time division multiplexed bus. Time slots assigned to the various devices recur at a number of rigidly-spaced access periods across each time division multiplex frame. The rate at which the access periods occur and the total number of access periods that make up each frame are chosen in such a way as to accomodate a mix of devices having respective bus access rates wherein there is at least one pair of rates for which neither rate of the pair is a multiple of the other. The process of allocating access periods to the time slots is carried out using a known lemma to identify linear Diophantine equation solutions.

REFERENCES:
patent: 3599160 (1969-03-01), Nestle

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