Static information storage and retrieval – Addressing – Sync/clocking
Patent
1983-02-22
1985-10-29
Cardillo, Jr., Raymond F.
Static information storage and retrieval
Addressing
Sync/clocking
360 51, G11C 800
Patent
active
045503915
ABSTRACT:
A digital data capture window extension circuit utilizing a matched pair of signal detection subcircuits that are activated during alternate cycles of a master read clock. The interleaved operation of the paired subcircuits permits each subcircuit to detect and process an incoming data signal, resulting in an effective overall processing rate twice that of prior art circuitry. The invention therefore permits the reading of data at a high rate using a system clock of the same frequency as the incoming data.
REFERENCES:
patent: 3414889 (1968-12-01), Higgins et al.
Ambrosius, III William
Chung Randall
Bowler Alyssa H.
Cardillo, Jr. Raymond F.
Western Digital Corporation
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