Data capture logic for VLSI chips

Details Data capture logic for VLSI chips Data capture logic for VLSI chips

1985-04-15

1987-04-21

Fleming, Michael R.

Excavating

371 16, 371 20, 371 29, G01R 3128, G06F 1100

Patent

active

046601988

ABSTRACT:
A circuit means for detecting data errors in VLSI processing circuits at the earliest point such an error occurs in the processing stream or (in different modes) at any selected point therein, and for providing the prior operands and faulty (intermediate) output data together with an indication of what is wrong with the data. Described are registers and/or means for controlling the mode of the circuitry, error detection means (being, for example, parity check circuits), and an output means for providing the output in an organized way responsive to the controlling means and the output of the error detecton means. The method of using such a circuit is inherent in the disclosure.

REFERENCES:
patent: 4233682 (1980-11-01), Liebergot
patent: 4357703 (1982-11-01), Van Brent
patent: 4395767 (1983-07-01), Van Brent
patent: 4554661 (1985-11-01), Bannister
patent: 4578773 (1986-03-01), Desai
patent: 4622669 (1986-11-01), Pri-Tal

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