Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data
Reexamination Certificate
2007-10-09
2007-10-09
Fan, Chieh M. (Department: 2611)
Pulse or digital communications
Synchronizers
Synchronizing the sampling time of digital data
C375S371000, C375S354000, C375S373000, C375S356000, C326S096000, C327S144000, C327S141000, C713S400000, C713S500000, C713S501000, C713S600000
Reexamination Certificate
active
10685176
ABSTRACT:
Method and apparatus for data recapture from a source synchronous interface. A data signal is obtained via the source synchronous interface. A timing signal is obtained via the source synchronous interface, where the data signal and the timing signal are provided in association with one another. The timing signal is frequency divided by frequency divider to provide an enable signal. Data of the data signal is captured responsive to the timing signal and the enable signal, where the data captured is in a time domain of the timing signal. A data valid signal is generated from the enable signal and an internal clock signal, where the data valid signal is internally timed without having to determine a system level delay. The data is recaptured responsive to the internal clock signal and the data valid signal, where the recaptured data is in a time domain of the internal clock signal.
REFERENCES:
patent: 6701390 (2004-03-01), Ehmann
patent: 6941484 (2005-09-01), To et al.
patent: 7076377 (2006-07-01), Kim et al.
patent: 2004/0193823 (2004-09-01), Kelly
George Maria
Gopalakrishnan Lakshmi
Gupta Chandrasekaran N.
Fan Chieh M.
Webostad W. Eric
Xilinx , Inc.
Zheng Eva
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