Data cache initialization

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364DIG1, 364243, 3642434, 36424341, 364240, 3642401, 3642402, 3642403, 36523002, G06F 1300, G06F 1200

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051135086

ABSTRACT:
A data processing system including a data cache with the capability to selectively zero the contents of the data cache. The invention includes a multiplexor arranged to provide a parallel data output that is greater than the parallel data input from either a central processing unit or from a memory that are each connected to access the data cache. This multiplexor is selectively controlled to provide a parallel data output of zeroes upon the decoding of a specific zeroing instruction.

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IBM Technical Disclosure Bulletin, vol. 17, No. 7, Dec. 1974, "Automatic Partial Deletion of High-Speed Buffer Entries", pp. 2038-2039.

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