Data bus with noise immunity

Details Data bus with noise immunity Data bus with noise immunity

1995-03-17

1997-11-04

Chin, Stephen

Pulse or digital communications

Cable systems and components

375275, H04B 300

Patent

active

056848315

ABSTRACT:
A class 2 or UART data communication bus is subject to disruption by induce high frequency currents because of an impedance mismatch between a passive pull-up or pull-down resistor and a lower impedance active current sourcing or sinking stage. An impedance reduction circuit across the passive resistor balances the impedance in the presence of high frequency noise. The impedance reduction circuit is operative when it senses a bus line voltage slew rate greater than that caused by data pulses and a voltage change greater than one diode drop.

REFERENCES:
patent: 3868519 (1975-02-01), Green
patent: 5041793 (1991-08-01), Galius
patent: 5321724 (1994-05-01), Long et al.
patent: 5355390 (1994-10-01), Yamamoto et al.
patent: 5513218 (1996-05-01), Moller

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