Data bus using open drain drivers and differential receivers tog

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, H03K 190175

Patent

active

053110811

ABSTRACT:
An open drain driver, differential receiver circuit for transmitting logic signals generated by metal oxide semiconductor (MOS) logic circuits over a data bus that uses distributed termination impedances. The distributed termination impedance values are chosen to minimize the data bus settling time both when a driver in a given module drives a signal consisting of alternating logic levels, as well as when two different drivers drive a given logic level in succession. Each open drain driver includes a multiplexor, a flip flop, an inverter stage, and a driver transistor. The multiplexor selects either a data signal to be transmitted or a deasserted data value to be passed to the input of the flip flop. The flip flop also accepts a test input, which sets the flip flop to a known state. As a result, no additional delay is inserted in the critical path between the rising edge of a flip flop clock input signal and the driver output. The companion differential receiver receives a reference voltage which is separately generated on each module, to permit the use of distributed power supplies while still adjusting for variations which may exist in a termination voltage from module to module.

REFERENCES:
patent: 4223277 (1980-09-01), Taylor et al.
patent: 4739193 (1988-04-01), Doty, II
patent: 4774422 (1988-09-01), Donaldson et al.
patent: 4970410 (1990-11-01), Matsushita et al.
patent: 5023488 (1991-06-01), Gunning
patent: 5070256 (1991-12-01), Grondalski
"Logical Dotting of Tri-State Drivers", IBM Technical Disclosure Bulletin, vol. 30, No. 9, Feb. 1988, New York, pp. 250-252.
P. Boulay, "Push SCSI Performance to the Limit"; Electronic Design, vol. 38, No. 9, May 1990, Hasbrouck Heights, N.J., pp. 85-92, XP125954.

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