Patent
1995-04-28
1998-01-13
Ray, Gopal C.
G06F 13362
Patent
active
057087830
ABSTRACT:
A data bus arbiter for supporting pipelined transactions employs a circular FIFO for storing bus requests. The arbiter includes two pointers which reference the entries of the FIFO. A first pointer is incremented upon detection of the end of a bus cycle. A second pointer is incremented when a new bus cycle is started.
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Apple Computer Inc.
Lefkowitz Sumati
Ray Gopal C.
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