Data buffer circuit

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Details

365 78, G06F 300

Patent

active

043886981

ABSTRACT:
A data buffer circuit is disclosed for receiving from a serial-to-parallel ata conversion interface circuit a plurality of sixteen-bit parallel data words, for storing therein for a predetermined time period each of the parallel data words, and for transferring to a computer, so as to allow for processing by the computer, each of the parallel data words.

REFERENCES:
patent: 3823393 (1974-07-01), Norris
patent: 4047157 (1977-09-01), Jenkins

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