Data block synchronization device, system and method

Details Data block synchronization device, system and method Data block synchronization device, system and method

2002-12-16

2008-11-25

Payne, David C. (Department: 2611)

Pulse or digital communications

Synchronizers

Frequency or phase control using synchronizing signal

C370S395530, C370S395620, C370S509000, C370S510000, C370S513000, C370S514000, C714S776000

Reexamination Certificate

active

07457389

ABSTRACT:
Described are a system, method and device to synchronize block data received in a data stream where the data stream is received on set data word increments. A synchronization header in each of a plurality of consecutive data word increments may be detected in a common location of a set portion or window of each consecutive fixed word increment. The data stream may be slipped by a fixed bit quantity in response to detecting an absence of the synchronization header in the common location of the set portion of a received data word increment.

REFERENCES:
IEEE Draft P802.3ae/D5.0, clauses 46-49, May 1, 2002, pp. 271-341 and 343-389.
Office Action of Related Chinese Application Serial No. 200310120659.2(Intel Ref: P15224CN), mailed Mar. 3, 2006, 4 pgs.

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