Data bit synchronizer

Details Data bit synchronizer Data bit synchronizer

1986-10-31

1989-06-13

Cangialosi, Salvatore

Multiplex communications

Wide area network

Packet switching

370 94, 3701101, 364200, H04J 302

Patent

active

048398900

ABSTRACT:
A data bit synchronizer particularly adapted for use with a multiplexing character processor of the type that multiplexes data characters to and from a plurality of communication lines to a central processing unit. The data bit synchronizer is operable with communication lines carrying various protocols and data bit rates. A RAM memory stores the control and status information for each of the plurality of communication lines.
The RAM is accessed at a rate corresponding to the rate used to multiplex the communication lines to repeatedly output the information associated with each communication line. The data bit synchronizer also incorporates a bit rate clock generator for generating timing signals corresponding to selectable output data rates. A multiplexer is used to multiplex the timing signals with the control and status information.

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