Data and clock recovery system having a phase-locked-loop and wh

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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329 50, 331 17, 331 25, 360 51, H03L 710, H03D 318

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active

043652107

ABSTRACT:
A data and clock recovery system for capturing and processing serial data of a type wherein data bits of an unknown format are interleaved with clock bits utilizes a phase lock loop capable of being operated in a capture mode or a tracking mode. The data stream is compared with an internally generated reference signal, and error pulses having widths proportional to the phase error are generated. In the capture mode, these error pulses are differentially processed to produce a control voltage which varies the frequency of a VCO which in turn alters the reference frequency. In the tracking mode, phase error pulses of fixed widths are processed only if the data bits occur in fixed windows. Differential amplifying means provide adjustable gain control of the error pulses. Means are provided for digitally controlling the loop's dynamic response when switching between the capture and tracking modes.

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patent: 4003086 (1977-01-01), Larsen et al.
patent: 4007429 (1977-02-01), Cadalora et al.
patent: 4117420 (1978-09-01), DeConinck et al.
patent: 4138650 (1979-02-01), Anderson

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