Boots – shoes – and leggings
Patent
1986-08-25
1989-05-30
Williams, Jr., Archie E.
Boots, shoes, and leggings
G06F 305, G06F 1128
Patent
active
048357367
ABSTRACT:
A memory pointer circuit includes a plurality of counters and a programmable logic array for controlling the counters to generate addresses for an acquisition memory. The programmable logic array directs a lower counter to generate a repeating sequence of addresses to store data before an event occurs, each pass through the sequence causing previously written data to be overwritten until an event has occurred and is stored in memory. The programmable logic array then directs the upper counters to increment and the lower counter to generate a following sequence of addresses to store data after the event occurs. Once the following sequence is complete, the upper counters are again incremented and the repeating sequence of addresses is again generated. The procedure is repeated to store multiple clusters of data and events in the acquisition memory. Once the acquisition memory is full, the stored data and events can be saved or overwritten.
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Becker Mark L.
Hulse Robert S.
Mohamed Ayni
Tektronix Inc.
Williams Jr. Archie E.
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