Data acquisition system comprising real-time analysis and...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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Details

C341S161000

Reexamination Certificate

active

06297760

ABSTRACT:

The international applications PCT/CH98/00377 (WO99/60494) and PCT/CH99/00154 (WO99/60496), whose contents are hereby incorporated by way of reference, claim the priority of the same application EP98810452.7.
1. Field of the Invention
The present invention concerns a data acquisition system comprising a circuit for converting an analog input signal into a plurality of digital signals, according to the preamble of claim
1
. The present invention concerns in particular a data acquisition system comprising a conversion circuit supplying digital signals for processing by a digital processor in a data acquisition system.
2. Related Art
Many types of data acquisition systems are known, for example transitory recorders and digital oscilloscopes, in which it is necessary to convert one or several analog signals into one or several digital signals capable of being stored in a digital memory and processed by a digital processor. These systems comprise generally an input stage constituted of one or several digitizers and of a memory for digitized data; the processor accesses said memory most often through a bus. In low-frequency systems, this memory can for example be constituted directly by the RAM of a computer. The digitized data are stored in this memory and processed, for example displayed, by the processor of this computer either in real time or later, for example when all the data have been acquired.
More and more often in electronic technology, very high frequency analog signals requiring very fast acquisition systems, for example oscilloscopes, are used. Digitizers are currently made that work with a sampling frequency greater than 500 MHz, for example on the order of 1 GHz or more; it is to be predicted that these current limits will be exceeded with the appearance of better performing components. These digitizers enable by virtue of the Nyquist principle to supply an unambiguous digital representation of analog signals having a maximum frequency of several hundred MHz.
These ultra-fast digitizers supply a digital word, for example an octet in the case of eight bit converters, at each flank of the sample signal, for example each nanosecond; the digital output frequency generated is thus extremely high, and generally incompatible with the maximum write access frequency of the usual memory circuits. One thus knows the utilization of demultiplexers, which make it possible in a data acquisition system to supply in parallel N words delivered in series by a digitizer. The output frequency of the demultiplexer is divided by N, at a price of an increase by this same factor of the width of the data bus. The demultiplexer thus allows a stream of words of m bits to be converted into another stream of words of N×m bits of output rate N times weaker, and thus compatible with the writing speeds of available memory components.
In many situations, interest will be directed more particularly to certain specific events in a continuous or very long data stream. For example, one often wishes to acquire a temporal window of limited size around a particular event of the analyzed signal, for example around a zero crossover. When the stream of data to be analyzed is continuous, or very long, it is not possible to store it entirely in a memory at an acceptable cost. The size of the available memory in a conventional system thus generally imposes a compromise between the sampling frequency and the length of acquisition of the signal. If the acquisition window memorized is too short, however, there is a risk that it does not to contain the most important times of the signal, notably the samples just before and just after the occurrence of a particular event of the signal.
Document U.S. Pat. No. 5,397,981 describes a circuit for converting an analog input signal into digital signals. The circuit comprises a circuit for analyzing the analog data that permits the acquisition to be interrupted upon detecting a predefined event in the stream of analog data.
The article by Huba G: “
High
-
Speed Data Acquisition with SDA
8020
by Data Splitting”
, vol. 24, N
o
6, Dec. 1
st
, 1989, pages 233-235, ISSN:0945-1137, describes an ECL-TTL conversion circuit provided with a counter defining the writing address in a CMOS memory. This document does not however concern the analog-to-digital conversion and does not suggest to modify the writing address according to the ECL data entered.
A purpose of the invention is to remedy the mentioned inconveniences, and to extend the possibility of real-time processing and analysis of high-frequency digital data in a data acquisition system.
Another purpose is to supply a system enabling digital samples to be acquired in a temporal window linked temporally with a predefined event in this signal, and thus to memorize mainly the most important portions of the signal.
BRIEF SUMMARY OF THE INVENTION
According to the invention, these purposes are achieved by means of a data acquisition system comprising the elements of claim
1
, different embodiments being further indicated in the dependent claims.
In particular, these purposes are achieved with a data acquisition system in which, upon detection of a particular event in a stream of digital data by means of a real-time analysis circuit, the storage of data in the storage memory is altered, for example interrupted, so as to enable the processing or visualizing of a limited portion of the data stream.
According to the invention, these purposes are further achieved by means of a circuit for converting a high-frequency analog signal into a plurality of digital signals for processing by a digital processor in a data acquisition system, comprising an analog-to-digital converter, a storage element accessible by the processor for storing the converted digital data, and a circuit for analyzing in real time the converted digital data, able to modify the data storage address in the storage means upon detecting a particular event in the converted digital data.
In a preferred embodiment of the invention, the analysis circuit is connected at the output of a demultiplexer supplying in parallel a plurality of words of m bits supplied in series by the analog-to-digital converter.
By making or programming the analysis circuit in an appropriate manner, it is thus possible to detect in real time any event in the stream of digital data, and thus to immediately modify the storage address of these data so as to keep in memory a temporal window linked to this event.
Advantageously, the operation of the real-time analysis circuit can be defined with parameters or even completely determined or programmed by the digital processor; a great flexibility is thus achieved, and it is possible to effect a detection of the different events without modifying the physical configuration of the circuit.


REFERENCES:
patent: 4654632 (1987-03-01), Yoshida et al.
patent: 6166673 (2000-12-01), Odom
patent: 0 375 246 A2 (1990-06-01), None
patent: 0 629 966 A1 (1994-12-01), None
Georg Huba, “High-Speed Data Acquisition with SDA 8020 by Data Splitting”,Siemens Components XXIV,Dec. 1989, pp. 233-235.

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