Darlington type switching stage for a line decoder of a memory

Static information storage and retrieval – Addressing

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365241, 307315, 307463, G11C 1140

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active

047062223

ABSTRACT:
A switching stage receives two levels at its input, i.e. a high selection level and a low non-selection level. The Darlington stage (T.sub.1, T.sub.2) supplies at its output (E) a high current in the selected mode and a considerably smaller current in the non-selected mode. In order to accelerate the evacuation of charges accumulated in the base of T.sub.2 and hence the deselection time of the stage, an auxiliary current source (I), is connected to a point A. Between the base (B) of the transistor T.sub.2 and the point A two diodes (D.sub.1, D.sub.2) are connected in series in the forward direction. Between the emitter (E) of T.sub.2 and the point A a diode (D.sub.3) is connected in the forward direction. In the selected mode, the major part of the current I passes through D.sub.1, D.sub.2 and this current permits the evacuation of the charges from the base of the transistor T.sub.2 when the stage is deselected.

REFERENCES:
patent: 3533007 (1970-10-01), Segar
patent: 4236089 (1980-11-01), Baker
patent: 4347586 (1982-08-01), Natsui
patent: 4394657 (1983-07-01), Isogai et al.
patent: 4488263 (1984-12-01), Herdorn et al.
patent: 4603268 (1986-07-01), Davis
B. Cassidy, "Pulse Power Voltage Driver Circuit", Dec. 1972, IBM Technical Disclosure Bulletin-vol. 15, No. 7.
Inadachi, "A GnS 4kb Bipolar Ram-Memory Cell", Feb. 15, 1979, IEEE-International Solid-State Conference-pp. 108-109.

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