Darlington transistor arrangement

Details Darlington transistor arrangement Darlington transistor arrangement

1985-02-27

1986-12-30

Miller, Stanley D.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307255, 307288, 307297, 330288, H03K 326, H03F 304

Patent

active

046331000

ABSTRACT:
The emitter of an input transistor (T.sub.1) of a Darlington transistor is connected to the base of an output transistor (T.sub.2). The collector of the input transistor (T.sub.1) is connected to the input of a current amplifier circuit comprising a third transistor (T.sub.3) arranged as a diode and having a first resistor (R.sub.1) arranged in its emitter circuit, and a fourth transistor (T.sub.4) having its base is connected to that of the third transistor (T.sub.3) and having a second resistor (R.sub.2) arranged in the emitter circuit. The collector of the fourth transistor (T.sub.4) is connected to the base of the output transistor (T.sub.2). The ratio between the resistance values of the first and the second resistors (R.sub.1, R.sub.2) is larger than the ratio between the emitter areas of the fourth and the third transistor (T.sub.4, T.sub.3). Thus, for small currents a low and for large currents a high current gain is obtained, so that the current gain factor of the output transistor (T.sub.2) which decreases for large currents is compensated for partly. Moreover, the base current of the input transistor (T.sub.1) remains small in the case of large output currents.

REFERENCES:
patent: 3979606 (1976-09-01), Ahmed
patent: 4371792 (1983-02-01), Dobkin
patent: 4467226 (1984-08-01), Nagasawa
patent: 4542399 (1985-09-01), Monticelli

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