Darlington cascode

Amplifiers – With semiconductor amplifying device – Including plural stages cascaded

Reexamination Certificate

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Reexamination Certificate

active

06806778

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a method and/or architecture for implementing amplifiers generally and, more particularly, to a method and/or architecture for implementing an internally cascaded Darlington amplifier.
BACKGROUND OF THE INVENTION
Conventional multi-decade direct-coupled amplifiers are used in broadband applications such as instrumentation, fiber optics communication, and fast computing systems. Wide-bandwidth is achieved by combining broadband circuit topologies, like distributed and Darlington feedback amplifiers, with a high speed technology like Silicon Germanium (SiGe) or Indium Phosphide (InP) heterojunction bipolar transistor (HBT) architectures. However, high speed technologies typically compromise breakdown voltage for increased cut-off frequency (fT).
Referring to
FIG. 1
, a bipolar (BJT, HBT) breakdown voltage versus device cut-off frequency speed (fT) of various semiconductor device technologies is shown. For a given bipolar semiconductor technology, there is a constrained trade off between breakdown voltage and device speed, known as the “Johnson Limit”. Compound semiconductors such as Gallium Arsenide (GaAs) and InP HBTs whose material properties provide higher electron velocities (as well as direct and wide bandgaps) offer a higher breakdown versus fT product curve. However, in order to exploit their ultimate speeds, compound semiconductors still must be designed with a relatively low breakdown voltage. This can mean pushing the respective technologies to a point where the breakdown voltage (BVceo) is lower than 2 Vbe, considered the minimum limit for high frequency operation of the conventional Darlington topology.
Referring to
FIG. 2
, a diagram of a circuit
10
illustrating a conventional approach is shown. The circuit
10
is shown having a transistor Q
1
, a transistor Q
2
, a resistor RE
1
, and a resistor RE
2
.
FIG. 3
illustrates a plot of the output characteristics of a conventional Darlington amplifier.
FIG. 3
assumes a simple case where the resistor RE
2
=0 and also assumes a large base source impedance to calculate limits where finite base source impedance is meant to provide design margin.
To ensure high frequency performance, the transistor Q
1
must be strongly biased in the forward active region so the collector to emitter voltage Vcel is at least one Vbe. For high frequency operation, the bias of the transistor Q
2
has a collector to emitter voltage Vce
2
greater than 2 Vbe. For a given DC output voltage, there will typically be a voltage of one VBE more across the transistor Q
2
than across the transistor Q
1
. The emitter voltage Vce
2
of the transistor Q
2
sets the maximum reliable operating voltage of the conventional Darlington amplifier (assuming similar base impedances presented to both the transistor Q
1
and the transistor Q
2
). Therefore, for robust operation, the transistor technology used must have a breakdown voltage BVceo greater than 2 Vbe for low current density operation (less than 0.5 mA/um
2
) and, more practically, a breakdown voltage BVceo greater than 4 Vbe for high current density wideband operation (i.e., greater than 0.75 mA/um
2
). The latter is more practical since the breakdown voltage BVceo is the breakdown under zero collector current and the device breakdown voltage BVce strongly degrades with increased collector current density.
Referring to
FIG. 4
a circuit
50
is shown illustrating another conventional Darlington amplifier. The circuit
50
is shown having a transistor Q
1
, a transistor Q
2
, a resistor RE
1
, a resistor RE
2
, and a diode D
1
.
FIG. 5
illustrates a plot of the output of the circuit
50
.
FIG. 5
assumes a simple case where the resistor RE
2
=0. In order to increase the practical breakdown voltage and corresponding operating voltage of the conventional Darlington, the diode D
1
is sometimes placed in series with the collector of the transistor Q
2
. This increases the maximum output operating voltage by one diode drop. In this case, the transistor Q
1
and the transistor Q
2
may impose an equal constraint on breakdown operation of the Darlington. This increases the breakdown voltage of the Darlington amplifier to BVceo+Vbe (D
1
) and relaxes the BVceo requirement of the process by one VBE. However, the additional diode D
1
may have an adverse affect on performance due to the dynamic parallel RC load presented to the output node of the Darlington amplifier cell.
It would be desirable to implement an apparatus which can enhance the breakdown voltage of an amplifier, in particular a Darlington amplifier, while also providing enhanced bandwidth capability.
SUMMARY OF THE INVENTION
The present invention concerns an apparatus comprising a Darlington transistor pair and a common-base transistor. The Darlington transistor pair may be configured to generate an output signal at an output node in response to an input signal received through an input node. The common-base transistor may be coupled between an output transistor of the Darlington transistor pair and the output node. The common-base transistor may have a base configured to receive a reference voltage.
The objects, features and advantages of the present invention include providing a common-base transistor within a Darlington pair that may (i) provide improved breakdown voltage, thermal stability, and bandwidth, (ii) provide a low impedance voltage reference to a common-base transistor to improve breakdown voltage and/or frequency response and/or linearity of the amplifier, (iii) be implemented in a wideband transimpedance amplifier that may be suitable for optical receiver applications, and/or (iv) provide a transimpedance amplifier that may utilize the Darlington Cascode invention in order to obtain improved breakdown, thermal stability, and wider bandwidth when compared to a conventional Darlington based transimpedance amplifier.


REFERENCES:
patent: 4312011 (1982-01-01), Kanbayashi
patent: 4485301 (1984-11-01), Gontowski et al.
patent: 4616144 (1986-10-01), Hideshima et al.
patent: 4706038 (1987-11-01), Navidi et al.
patent: 4755694 (1988-07-01), Bodig et al.
patent: 4777386 (1988-10-01), Majumdar
patent: 5397914 (1995-03-01), Suda et al.
patent: 5661431 (1997-08-01), Ueno et al.
patent: 5923211 (1999-07-01), Maley et al.

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