Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2001-07-09
2003-06-10
Ho, Hoai (Department: 2818)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S399000, C438S601000, C438S636000, C438S637000, C438S648000, C438S672000, C438S675000, C438S685000
Reexamination Certificate
active
06576526
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method for the creation of a Metal-Insulator-Metal (MIM) capacitor for using in rf or mixed signal applications.
(2) Description of the Prior Art
Modern semiconductor technology requires the creation of high performance semiconductor devices that are produced at competitive prices. A direct result of this requirement is that device density and inter-device packaging density continue to increase from which directly follows the requirement that the surface area or space that is available on the surface of a semiconductor substrate is carefully allocated and maximized in its use.
The majority of semiconductor devices perform functions of digital data processing, electronic circuitry can nevertheless be divided into two broad fields. One field addresses digital processing while the second field addresses the manipulation of analog signals. Digital semiconductor devices have as function the manipulation or storage of digital information. The functions of analog electronic circuitry have in previous years typically been handled by separate components such as relatively large capacitors or relatively large inductors. The separate components may have been applied in combination with digital processing capabilities, whereby however a significant portion of the functional implementation has been realized by the use of for instance capacitive and inductive components in addition to and functionally collaborating with the digital components. Circuit requirements that are imposed on components that are required for analog processing have in the past limited the integration of such components into typical semiconductor integrated circuit devices.
Modern mobile communication applications center around compact high-frequency equipment. With the continued improvements in the performance characteristics of this equipment, continued emphasis will be placed on small size of the equipment, low power consumption, increased frequency applications and low noise levels. Semiconductor devices are used in the field of mobile communication for the creation of Radio Frequency (RF) amplifiers. A major component of a typical RF amplifier is a tuned circuit that contains inductive and capacitive components. Major components used for the creation of high frequency analog semiconductor devices are capacitors and inductors that form a LC resonance circuit. Most high Q inductors and capacitors form part of a hybrid device configuration or of Monolithic Microwave Integrated Circuits (MMIC's) or are created as discrete components, the creation of which is not readily integratable into a typical process of Integrated Circuit manufacturing.
By combining the creation on one semiconductor monolithic substrate of circuitry that is aimed at combining the functions of analog data manipulation and analog data storage with the functions of digital data manipulation and digital data storage, a number of significant advantages are achieved. Such advantages include the reduction of manufacturing costs and the reduction of power consumption by the combined functions. Radio Frequency (rf) and analog circuits are integrated with high-speed and high-performance digital circuits in CMOS mixed-signal applications. Requirements that are imposed on capacitors that are created for mixed-mode applications are the creation of a capacitor that has a high quality factor Q, that has a linear capacitive value over a range of voltages applied between the electrodes of the capacitor, that is not dependent in its performance on the temperature over which the capacitor is applied, that can be created as part of a CMOS processing cycle, that can be created as part of the creation of sub-micron devices, that has high unit capacitance with low voltage coefficients and low contact resistance. The invention provides a process for the creation of a capacitor that addresses these issues.
U.S. Pat. No. 6,083,805 (Ouellet et al.) shows a capacitor with various TiN/Ti layers—col. 2, lines 31-47.
U.S. Pat. No. 5,812,364 (Oku et al.) shows a MIM capacitor.
U.S. Pat. No. 5,268,315 (Prasad et al.), U.S. Pat. No. 6,110,772 (Takada et al.), U.S. Pat. No. 6,174,766 (Hayashi et al.), U.S. Pat. No. 5,946,567 (Weng et al.) and U.S. Pat. No. 5,985,731 (Weng et al.) show related capacitors and processes.
SUMMARY OF THE INVENTION
A principle objective of the invention is to create a Metal-Insulator-Metal (MIM) capacitor for mixed signal applications.
Another objective of the invention is to provide a process of creating a MIM capacitor that allows for the use of a good anti reflection layer for the second electrode mask.
Yet another objective of the invention is to provide a process of creating a MIM capacitor that allows for the use of a good stop or buffer layer for subsequent via etch processing.
A still further objective of the invention is to provide a process of creating a MIM capacitor that allows for the use of a good stop layer for MIM spacer etch and for the protection of the upper electrode surface.
In accordance with the objectives of the invention a new processing sequence is provided for the creation of a MIM capacitor. The process starts with the deposition of a first layer of metal (for the first electrode of the MIM capacitor), preferably comprising an aluminum-copper alloy, over a semiconductor surface. Next are deposited in the sequence listed, a thin layer of metal (for a surface layer of the first electrode of the MIM capacitor, as a buffer layer for the via etch), preferably comprising titanium nitride, a layer of insulation that has the dual functions of serving as the dielectric for the MIM capacitor and of serving as an etch stop layer (used during the various etching steps of the invention that is during the etch for the second electrode of the MIM capacitor, during a spacer etch and during a via etch to establish contacts to the MIM capacitor), preferably comprising silicon nitride, a second layer of metal (for the second electrode of the MIM capacitor), preferably comprising titanium nitride and a layer of Anti Reflective Coating (forming a good anti reflection layer for the second electrode mask in addition to serving as a layer of protection of the surface of the second electrode during the spacer etch). An etch is then performed to form the second electrode of the MIM capacitor (using the etch stop layer to stop this etch), MIM spacers are formed on the sidewalls of the second electrode of the MIM capacitor (also using the etch stop layer to stop this etch), the MIM capacitor is isolated by etching through the second layer of insulation and the first layer of metal of the first electrode. This is followed by conventional processing to create contact points to the MIM capacitor.
REFERENCES:
patent: 5268315 (1993-12-01), Prasad et al.
patent: 5812364 (1998-09-01), Oku et al.
patent: 5920775 (1999-07-01), Koh
patent: 5946567 (1999-08-01), Weng et al.
patent: 5985731 (1999-11-01), Weng et al.
patent: 6083805 (2000-07-01), Ouellet et al.
patent: 6110772 (2000-08-01), Takada et al.
patent: 6124165 (2000-09-01), Lien
patent: 6156640 (2000-12-01), Tsai et al.
patent: 6174766 (2001-01-01), Hayashi et al.
patent: 6500763 (2002-12-01), Kim et al.
Chu Sanford
Hua Cheng-Wei
Kai Shao
Liang Chen
Ping Wu-Guan
Berry Renee R.
Chartered Semiconductor Manufacturing Ltd.
Ho Hoai
Pike Rosemary L. S.
Saile George O.
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