Damascene structure at semiconductor substrate level

Details Damascene structure at semiconductor substrate level Damascene structure at semiconductor substrate level

2006-05-23

2006-05-23

Potter, Rey (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S760000

Reexamination Certificate

active

07049702

ABSTRACT:
A damascene structure and process at semiconductor substrate level. A pre-metal dielectric layer is provided on a semiconductor substrate with an opening exposing a contact region on the substrate. A buffer metal layer is provided on the exposed contact region, and a barrier layer is provided on the interior of the opening. A conductor is provided on the buffer metal layer, substantially filling the opening to electrically connect to the contact region.

REFERENCES:
patent: 5856226 (1999-01-01), Wu
patent: 6211085 (2001-04-01), Liu
patent: 6309977 (2001-10-01), Ting et al.
patent: 541651 (1991-06-01), None

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