Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation
Reexamination Certificate
2008-07-15
2008-07-15
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
Responsive to electromagnetic radiation
C257SE31029
Reexamination Certificate
active
10633886
ABSTRACT:
A damascene approach may be utilized to form an electrode to a lower conductive line in a phase change memory. The phase change memory may be formed of a plurality of isolated memory cells, each including a phase change memory threshold switch and a phase change memory storage element.
REFERENCES:
patent: 5970336 (1999-10-01), Wolstenholme et al.
patent: 6567293 (2003-05-01), Lowrey et al.
patent: 6569705 (2003-05-01), Chiang et al.
patent: 6593176 (2003-07-01), Dennison
patent: 6791107 (2004-09-01), Gill et al.
patent: 6795338 (2004-09-01), Parkinson et al.
patent: 7227171 (2007-06-01), Bez et al.
patent: 2002/0079483 (2002-06-01), Dennison
patent: 2002/0177292 (2002-11-01), Dennison
patent: 2003/0132501 (2003-07-01), Gill et al.
patent: 2003/0186468 (2003-10-01), Lazaroff et al.
patent: 2003/0219924 (2003-11-01), Bez et al.
patent: 2005/0111247 (2005-05-01), Takaura et al.
patent: 2005/0239243 (2005-10-01), Tran et al.
patent: 2005/0239244 (2005-10-01), Tran et al.
patent: 251 225 (1987-11-01), None
patent: WO 2004/090984 (2004-10-01), None
Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C.., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Jeong, U.I., Jeong, H.S. and Kim, Kinam, “Completely CMOS-Compatible Phase-Change Nonvolatile RAM Using NMOS Cell Transistors,” presented at 2003 19thIEEE Non-Volatile Semiconductor Memory Workshop, Monterey, California, Feb. 26-20, 2003.
Ha, Y.H., Yi, J.H., Horii, H., Park, J.H., Joo, S.H., Park, S.O., Chung, U-In and Moon, J.T., “An Edge Contact Type Cell for Phase Change,RAM Featuring Very Low Power Consumption,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Oh, J.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Chung, U.I., Jeong, H.S. and Kim, Kinam, “Full Integration and Reliability Evaluation of Phase-change RAM Based on 0.24 mm-CMOS Technologies,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Horii, H., Yi, J.H., Park, J.H., Ha, Y.H., Baek, I.G., Park, S.O., Hwang, Y.N., Lee, S.H., Kim, Y.T., Lee, K.H., Chung, U-In and Moon, J.T., “A Novel Cell Technology Using N-doped GeSbTe Films for Phase Change RAM,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Chiang, C., Lee, J.W., Kersey, P., U.S. Appl. No. 09/745,835, filed Dec. 21, 2000 entitled “Metal Structure for a Phase-Change Memory Device”, 6569705.
Horii, H., Yi, J.H., Park, J.H., Ha, Y.H., Baek, I.G., Park, S.O., Hwang, Y.N., Lee, S.H., Kim, Y.T., Lee, K.H., Chung, U-In and Moon, J.T., “A Novel Cell Technology Using N-doped GeSbTe Films for Phase Change RAM,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Le Thao P.
Ovonyx Inc.
Trop Pruner & Hu P.C.
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