Daisy chainable memory chip

Details Daisy chainable memory chip Daisy chainable memory chip

2006-07-26

2008-03-11

Mai, Son L. (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S189011, C365S231000, C365S230050

Reexamination Certificate

active

07342816

ABSTRACT:
A memory chip suitable for use in a daisy chain of memory chips. The memory chip receives an address/command word on a first input, determines if the address command word is directed to the memory chip; if so, the memory chip accesses an array on the memory chip respondent to the address/command word. If not, the memory chip re-drives the address/command word on a first output. Write data is received as part of the address/command word or from a first data bus port. Read data is read from the array or is received from a second data bus port for subsequent re-driving on the first data bus port. A bus clock is received and is used to receive and transmit information on the first input, the first output, the first data bus port and the second data bus port.

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