Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2006-05-16
2006-05-16
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S154000
Reexamination Certificate
active
07046182
ABSTRACT:
A DAC architecture is provided which is monotonic in operation despite any mismatches in the components. The architecture is a segmented architecture and hence it is area efficient. This is achieved by effecting a generation of analog voltages by driving current sources to resistors in response to digital input. In a preferred embodiment, the invention provides a resistor string coupled between output and vref-, and set of current sources. The current sources are switched to nodes between resistors to generate voltages at the output.
REFERENCES:
patent: 3699568 (1972-10-01), Thompson et al.
patent: 5612696 (1997-03-01), Kim
patent: 5726652 (1998-03-01), Giuroiu
patent: 5943000 (1999-08-01), Nessi et al.
patent: 6225929 (2001-05-01), Beck
patent: 6683549 (2004-01-01), Kinugasa
Hunt William
Ja Kaushal Kumar
Lyden Colin G.
Phelan David A.
Raychaudhuri Arindam
Analog Devices Inc.
Jean-Pierre Peguy
Wolf Greenfield & Sacks P.C.
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