D.C-D.C. converter for converting an unstabilized D.C.-voltage t

Electric power conversion systems – Current conversion – Including d.c.-a.c.-d.c. converter

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Details

307 11, 363 72, H02M 324

Patent

active

045716668

DESCRIPTION:

BRIEF SUMMARY
FIELD OF INVENTION

The present invention relates to a D.C. converter for converting an unstablized incoming D.C. voltage to three stablized output D.C.voltages with the use of two chopper circuits. Such a converter can be used as the power source for a current supply to electronic equipment, especially airborn equipment where there is a demand for low weight and volume.


BACKGROUND

In power supply units with a high power output which is to be distributed to several loads, it is known in the art to utilize a D.C.-A.C. converter and to provide the converter with a transformer having a plurality of secondary windings, rectifiers and series regulators being connected to the secondary windings, as in U.S. Pat. No. 4,024,451, for example. Series regulation of the output voltages results in relatively high losses, and thereby lower efficiency, as well as in the limiting of power capacity. To avoid this, three separate converters must be used for higher power level, which of course increases the weight of the power supply unit.


SUMMARY OF INVENTION

An object of the present invention is to provide a D.C. converter of the kind mentioned above, which has as few component parts as is possible with respect to the number of obtained output voltages.
In accordance with the invention, there are employed two chopper stages with associated transformers, rectifiers and smoothing filters, to provide three independent D.C. voltage outputs with output power of the same order of magnitude. After rectifying and smoothing, the two chopper stages give a first and a second output voltage which is regulated by shifting the leading edge of the pulses in the first pulse-formed output voltage, while the second output voltage is regulated by shifting the trailing edge of the pulses in the second pulse-formed output voltage. A third output voltage is obtained by connecting the first and the second pulse-formed output voltages in parallel after rectifying and before smoothing. This output voltage can be kept constant and dependent on the other two output voltages, providing that both the first and the second output voltages work with overlapping in the respective controlled edge. Regulation of the third output voltage is obtained by varying the phase position between the first and the second chopper output voltage.


BRIEF DESCRIPTION OF DRAWINGS

The invention will next be described in detail with reference to the appended drawings, wherein:
FIG. 1 is a block diagram of a D.C.-D.C. converter in accordance with the invention,
FIG. 2 more closely illustrates the transformer stage, together with rectifier and smoothing filter incorporated in the converter according to FIG. 1; and
FIG. 3 is a time chart.


DETAILED DESCRIPTION

The incoming unstabilized D.C. voltage is denoted as Udc in the block diagram according to FIG. 1. The converter of the invention contains two chopper stages 1 and 2, which receive the D.C. voltage Udc and conventionally convert this voltage to a square-wave pulse train with a given frequency f.sub.O. For this purpose the chopper circuit 1 is controlled by a clock circuit 15, which sends control pulses with the frequency f.sub.O to the chopper stage 1 via a pulse width modulator 11 and a logic circuit 13. After rectification in a rectifier 3, a pulse-formed output voltage Uol (illustrated in FIG. 3) is obtained, and the output D.C. voltage U.sub.1 is obtained after smoothing in a lowpass filter 5. The voltage U.sub.1 is compared with a reference voltage Url in a comparison circuit 7, and the difference voltage is transmitted via an amplifier 9 to the control input of the pulse width modulator 11, for varying the pulse width of the control pulse sent to the chopper step 1, in response to the magnitude of the difference signal from the comparator 7. In this arrangement the pulse width is varied with the aid of the logic circuit 13 by varying the leading flank of the control pulses, while the trailing flank position is fixed. The frequency f.sub.o is constant for the whole time, and is determined by the clock circui

REFERENCES:
patent: 3571692 (1971-03-01), Andren
patent: 3852655 (1974-12-01), Justice
patent: 4449173 (1984-05-01), Nishino et al.

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