D/A converter with variable biasing resistor

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

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341154, H03M 178

Patent

active

052183645

ABSTRACT:
A D/A converter comprises a bias circuit including a series circuit of a drain-source of a bias FET and a bias resistor connected between a power source terminal and a reference potential point, the bias circuit includes a negative feedback amplifier to which a reference voltage is supplied, a digital to analog converting section includes a plurality of constant-current source FETs having a current value substantially equal to the current value of the bias FET of the bias circuit, and includes a plurality of current switches for selectively supplying currents of the constant-current source FETs to an output terminal in response to a digital input signal. An output resistor with resistance value Ro is connected to the output terminal to produce an analog output voltage across the output resistor and the resistance of the bias resistor is varied so as to adjust the full scale voltage across the output resistor while maintaining the relationship that the resistance value of the bias resistor is selected by (2.sup.n-1)Ro such that the full scale value of the output voltage is substantially equal to the reference voltage.

REFERENCES:
patent: Re29619 (1978-04-01), Pastoriza
patent: 4331892 (1982-05-01), Miskin et al.
patent: 4408094 (1983-10-01), Oura
patent: 4827260 (1989-05-01), Sugawa et al.
patent: 5055844 (1991-10-01), Kasai

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