Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Patent
1994-12-30
1997-01-14
Gaffin, Jeffrey A.
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
341118, 341119, 341153, H03M 106
Patent
active
055944418
ABSTRACT:
A D/A converter having a bias circuit that supplies a well-compensated gate voltage to a weighted current source part of the D/A converter, so that any changes in component characteristics due to the manufacturing of the components making up the D/A converter or due to temperature variations in the D/A converter are compensated for to output a correct analog voltage. The bias circuit comprises an amplifier and a p-type FET, where the drain of the p-type FET is fed back to a non-inverting input of the amplifier, and a reference voltage is applied to an inverting input of the amplifier. The bias circuit operates in a negative feedback condition, such that the non-inverting input is kept as close to the reference voltage as possible. A first resistor is connected to the drain of the p-type FET, to determine the current at the drain of the p-type FET. The weighted current source is made up of FETs having similar operating characteristics as the p-type FET of the bias circuit.
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Gaffin Jeffrey A.
Kost Jason L. W.
PSC Inc.
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