D/A converter with a gamma correction circuit

Details D/A converter with a gamma correction circuit D/A converter with a gamma correction circuit

1999-08-30

2001-05-01

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

Reexamination Certificate

active

06225931

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to a D/A converter with a Gamma correction circuit, and in particular to a D/A converter with a Gamma correction circuit which is utilized for compensation in liquid-crystal display (LCD) applications.
BACKGROUND OF THE INVENTION
Generally, in a conventional digital-to-analog converter (DAC), an output voltage is required to have a linear relation with the digital data input. However, in certain special cases, an output voltage of the DAC must have a non-linear relation with the digital data input. For example, in liquid-crystal display (LCD) applications, the relation between the brightness and voltage of an LCD is not linear. Therefore, a correction circuit generally called a Gamma correction circuit which is utilized for compensation should be added into the DAC circuit. However, a conventional DAC with a Gamma correction circuit takes up so much space that it occupies most of the area of a data driver.
FIG. 1
shows the structure of a R-DAC with a Gamma correction circuit according to the prior art. In this conventional R-DAC, digital data D0~D5 are decoded by the use of a ROM decoder
11
, and then a voltage-dividing resistor
121
is selected from a reference voltage generator
12
to output a corresponding voltage. The above-mentioned approach is simple, but taking an LCD application as an example, the number of gray levels varies directly with the space occupied by its structure. For example, the area of the R-DAC with 256 gray levels is 5.3 times that of the R-DAC with 64 gray levels.
FIG. 2
is a circuit diagram of a 2-divided C-DAC with a Gamma correction circuit, including switch
13
and capacitor
14
corresponding to digital data input. Even though the area of the 2-divided C-DAC is smaller than that of the R-DAC, many capacitors which take up a large area are used. Therefore, the area of the 2-divided C-DAC can be further reduced.
SUMMARY OF THE INVENTION
Accordingly, the main object of the invention is to provide a D/A converter with a Gamma correction circuit which has a simple structure, and the area of which is much smaller than those of the conventional R-DAC and 2-divided C-DAC. Therefore, its circuit design is simplified and the manufacturing cost is reduced. Besides, the shape of a Gamma correction conversion curve can be freely defined by users by adjusting their terminal voltages, thereby enhancing the range of applications.
To attain this above object, a D/A converter with a Gamma correction circuit according to the invention which receives N-bit digital data and outputs a corresponding analog voltage, comprises:
a plurality of terminal voltage sources, wherein nine reference terminal voltage sources V
8
~V
0
are defined by users;
a first terminal voltage selector and a second voltage selector, the terminals of which are connected to the plurality of terminal voltage sources respectively for the use of decoding the k highest bits (d
n−1
~d
n−k
) of the n-bit digital data to obtain a first reference voltage (Vh) and a second reference voltage (V1) from V
8
~V
1
and V
7
~V
0
;
a voltage selector, the terminals of which receive the first reference voltage and the second reference voltage respectively, wherein a first selecting switch (SELp) and a second selecting switch (SELn) decide a voltage difference between the first reference voltage and the second reference voltage by inputting the n-k lowest bits of the n-bit digital data in ascending order;
a first switch, a second switch and a third switch connected to each other in series and coupled between the output terminal of the voltage selector and the second reference voltage (V1);
a first capacitor, which is a charging capacitor, connected to the voltage selector in parallel; and
a second capacitor, which is a re-distributing capacitor, connected in parallel across the voltage selector.
Therefore, in a D/A converter according to the invention, the first terminal voltage selector and the second terminal voltage selector decode the highest bits (d
n−1
~d
n−k
) of the n-bit digital data to obtain the first reference voltage and the second reference voltage and then voltage selector receives the first reference voltage and the second reference voltage to decide a voltage difference between the first reference voltage and the second reference voltage by inputting the n-k lowest bits of the n-bit digital data in ascending order, thereby obtaining the output voltage of the D/A converter (the voltage value of the second capacitor) according to the following steps:
(a) the first switch and the third switch are turned on while the second switch is turned off, thereby charging the first capacitor and resetting the second capacitor;
(b) the first switch and the third switch are turned off while the second switch is turned on, thereby re-distributing the charges stored in the first capacitor and the second capacitor until the potentials of the first capacitor and the second capacitor are the same;
(c) input the next low bit of the n-bit digital data into the voltage selector and turn on the first switch while the second switch and the third switch are turned off, thereby recharging the first capacitor; and
(d) repeat steps (b) and (c) until the input of all low bit of n-bit digital data is completed, and finally, the voltage value of the second capacitor is the output voltage of the D/A converter.


REFERENCES:
patent: 5877717 (1999-03-01), Tu
patent: 6046719 (2000-04-01), Dingwall

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