Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2001-03-22
2002-10-29
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S150000
Reexamination Certificate
active
06473020
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a D/A (digital/analog) conversion apparatus for converting a digital signal into an analog signal, particularly to a D/A conversion apparatus in which by generating output voltage of an analog signal by averaging a plurality of divided voltages selected in correspondence with a digital signal of the D/A conversion apparatus, error of the respective divided voltages caused by a dispersion in respective elements formed on a semiconductor chip, thereby, high accuracy formation of the output voltage of the analog signal can be achieved.
2. Description of Related Art
An explanation will be given of an example of a conventional D/A conversion apparatus in reference to FIG.
1
.
FIG. 1
is a diagram showing an example of the conventional D/A conversion apparatus.
As shown by
FIG. 1
, the D/A conversion apparatus
100
is provided with a voltage generating circuit
101
, a voltage selecting circuit
102
, a decoder
103
and an amplifier
104
. The respective circuits
101
through
104
are formed on one semiconductor chip.
Further, the voltage generating circuit
101
is constituted by a ladder resistor comprising 255 pieces of resistors R
0
connected in series and resistors ½*R
0
connected in series with both end portions of the resistors R
0
and having a resistance value of a half of that of the resistor R
0
, and one end portion of the ladder resistor is supplied with reference power source voltage VR and other thereof is connected to the ground GND of the circuit. Further, from connection points among the respective resistors R
0
and the resistors ½*R
0
, that is, nodes N
0
A through N
255
A, predetermined divided voltages V
0
through V
255
are respectively outputted. For example, divided voltage Vn outputted from node NnA at an n-th order from node N
0
A, is represented by Vn=VR×(n+0.5)÷256 (incidentally, n=0 through 255).
Further, the voltage selecting circuit
102
is provided with 256 pieces of respective switches S
0
through S
255
and the respective switches S
0
through S
255
are constituted by MOS transistors. The respective switches S
0
through S
255
are respectively connected to nodes N
0
A through N
255
A. Further, output terminals of the respective switches S
0
through S
255
are connected by a node N
256
A.
Further, the node N
256
A is connected to an input terminal of the amplifier
104
. Further, output of the amplifier
104
is connected to an output terminal
105
.
Further, the decoder
103
is inputted with digital signals D
7
through D
0
of 8 bits from outside. Further, the decoder
103
outputs a control signal based on digital signals D
7
through D
0
of 8 bits and any one of the respective switches S
0
through S
255
of the voltage selecting circuit
102
is made ON in response to the control signal.
In this way, the node N
256
A is connected with any one of the respective nodes N
0
A through N
255
A of the voltage generating circuit
101
via any switch which is intended to be made ON.
Further, voltage of the node N
256
A is outputted to the output terminal
105
via the amplifier
104
. That is, the respective divided voltages V
0
through V
255
of the respective nodes N
0
A through N
255
A connected to the node N
256
A are connected to the output terminal
105
via the amplifier
104
. Thereby, output voltage of an analog signal in correspondence with the digital signals D
7
through D
0
is outputted from the output terminal
105
of the D/A conversion apparatus.
However, according to the above-described conventional D/A conversion apparatus
100
, the reference power source voltage VR is divided by the respective resistors R
0
through ½*R
0
and desired divided voltage can be selected, however, there is provided a dispersion in specific accuracy (error of shape and dimension in semiconductor fabrication process) in the respective resistors R
0
through ½*R
0
. Further, electric potential divided by the resistors is outputted as the analog signal as it is and accordingly, even when error is caused by dispersion in the resistors, the error is outputted as it is. Therefore, accuracy of the D/A conversion apparatus cannot be achieved so far as relative accuracy of the resistor is not sufficiently ensured. Further, there is a correlation between a size of a resistor element and relative accuracy in a semiconductor apparatus the more the resistor element is miniaturized, the more difficult the relative accuracy is achieved. In other words, in order to achieve certain constant accuracy, there is needed the resistor element size equal to or larger than a certain value. The accuracy of the resistor element poses a problem in downsizing and high accuracy formation of the D/A conversion apparatus.
SUMMARY OF THE INVENTION
The present invention has been carried out in order to resolve the problem of the conventional technology and it is an object thereof to provide a D/A conversion apparatus capable of averaging error of respective divided voltages generated by a dispersion in respective elements formed on a semiconductor chip by averaging a plurality of divided voltages selected in correspondence with digital signals of the D/A conversion apparatus and generating output voltage of an analog signal and capable of achieving high accuracy formation of the output voltage of the analog signal.
In order to achieve the above-described object, according to one aspect of the present invention, there is provided a D/A conversion apparatus comprising divided voltage generating unit for generating divided voltages by dividing voltage of a reference power source, selecting signal outputting unit for outputting a selecting signal by decoding inputted digital signals, divided voltage selecting unit for selecting and outputting a plurality of the divided voltages in the divided voltages based on the selecting signal, and voltage outputting unit for outputting predetermined voltage based on the plural divided voltages outputted from the divided voltage selecting unit.
According to the D/A conversion apparatus, the divided voltages are generated from the reference power source via the divided voltage generating unit. Further, the selecting signal by decoding the inputted digital signals is inputted to the divided voltage selecting unit via the selecting signal outputting unit. Further, the divided voltage selecting unit selects the plural divided voltages from the divided voltages based on the selecting signal and outputting the plural divided voltages to the voltage outputting unit and the voltage outputting unit outputs predetermined voltage based on the plural divided voltages outputted from the divided voltage selecting unit.
Thereby, output voltage of an analog signal is generated from the plural divided voltages and therefore, error of the individual divided voltage caused by dispersion of the respective elements formed on a semiconductor chip can be averaged and high accuracy formation of the output voltage of the analog signal can be achieved.
Further, according to another aspect of the present invention, there is provided a D/A conversion apparatus comprising divided voltage generating unit for generating a plurality of divided voltages based on inputted digital signals, and voltage outputting unit inputted with the plural divided voltages for outputting an average value of the plural divided voltages.
The D/A conversion apparatus generates the plural divided voltages based on the digital signals inputted via the divided voltage generating unit. Further, voltage of an average value of the plural divided voltages is outputted via the voltage outputting unit.
Thereby, the voltage of the average value of the plural divided voltages is generated as output voltage of an analog signal in correspondence with the inputted digital signals and therefore, error of individual divided voltage caused by dispersion of respective elements formed on a semiconductor chip can be averaged and high accuracy formation of the outpu
Arent Fox Kintner Plotkin & Kahn
Fujitsu Limited
Wamsley Patrick
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