Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Patent
1994-06-06
1996-07-23
Young, Brian K.
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
H03M 166
Patent
active
055394035
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a D/A (digital/analog) conversion apparatus for converting a digital signal to an analog signal, and an A/D (analog/digital) conversion apparatus for converting the analog signal to the digital signal, and particularly relates to a D/A conversion apparatus and an A/D conversion apparatus of oversampling type for performing D/A conversion, A/D conversion with a sampling frequency which is higher than a sampling frequency of the digital signal.
BACKGROUND OF THE INVENTION
As one of a D/A conversion apparatus, a D/A conversion apparatus using a noise shaper and a PWM is reported. The D/A conversion apparatus of this method which have been reported hitherto is elucidated by using FIG. 24. Incidentally, this technology is described in "National Technical Report (Volume 34, No. 2, April 1988) pp. 40-45", for example.
FIG. 24 is a block diagram showing an example of a conventional D/A conversion apparatus. Numeral 10 designates a digital filter (DF), and which multiplies a sampling frequency fs of an inputted digital signal by k (k.gtoreq.2). Herein, it is set to k=64. Numeral 11 designates the noise shaper (NS), and word length limitation of the digital signal which is output from the DF 10 is performed, and frequency characteristic of noise is changed to a predetermined characteristic thereby. Herein, it is provided that a noise shaper of third order characteristic is used and an output Y with respect to an input X is represented by an equation (1):
Moreover, it is provided that the output Y has an output of 11 level (=p). Numeral 19 designates a pulse width modulation circuit (PWM=pulse width modulator), and which converts to a pulse signal of 1-bit having 11 ways of pulse width corresponding to the digital signal output from the NS 11, and outputs as an analog signal. The D/A conversion apparatus of FIG. 24 further converts to the analog signal by using a clock of at least 704 times (=64.times.11) by the PWM 19, after a digital input signal is made to 64 fs of sampling frequency and 11 levels by the DF 10 and the NS 11, and is a D/A conversion apparatus of so called oversampling type for converting the digital signal to an analog signal with a higher sampling frequency.
Further detailed configuration of the NS 11 of FIG. 24 is shown in FIG. 25. Numeral 50 designates a first order .DELTA..SIGMA. modulator (1st order delta-sigma modulator) which outputs by performing quantization of the input X and change of the frequency characteristic of the noise and extracts a quantizing error component -Vq1 and outputs to a next step. An output Y1 with respect to the input X is represented by an equation (2):
Moreover, it is here assumed that the output Y1 has outputs (-3-+3) of seven levels (=p1). Numeral 51 designates a second order .DELTA..SIGMA. modulator, and the quantizing error component -Vq1 of the first order .DELTA..SIGMA. modulator 50 and performs quantization of the above-mentioned input -Vq1 and outputs change of the frequency characteristic of the noise. An output Y2 with respect to the input -Vq1 is represented by an equation (3):
Moreover, it is here assumed that the output Y2 has outputs (-1, 0, +1) of 3 levels. Numeral 52 designates a differentiator, and the output Y2 is digital-differentiated and is output. An output Y2' with respect to the input Y2 of the differentiator 52 is represented by an equation (4): ##EQU1##
The output Y2' at this time has outputs (-2-+2) of 5 levels (=p2). Numeral 53 designates an adder, and the output Y of the NS 11 is obtained by adding the outputs Y1 and Y2'.
In the D/A conversion apparatus of FIG. 24, result derived by simulation on output signal spectrum in the case of 64 fs of sampling frequency (FS), about 0.02 fs of input signal frequency and 0 dB of the input signal level is shown in FIG. 26. For simplicity, a signal until 0-2 fs is shown here. As mentioned above, although a digital signal of only 11 levels is converted into an analog signal, as shown in FIG. 26, a dynamic range (D.R.) of 120 dB or more is obt
REFERENCES:
patent: 4414641 (1983-11-01), Jarrett
patent: 5343197 (1994-08-01), Kanai et al.
Fukumoto Yoshihiko
Hatanaka Hideaki
Kaneaki Tetsuhiko
Sobajima Akira
Tani Yasunori
Matsushita Electric Industrial Co Ltd
Young Brian K.
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