Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2001-02-15
2004-08-17
Chaki, Kakali (Department: 2124)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S405000, C708S492000
Reexamination Certificate
active
06779014
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to decoding of a communication system, and especially to cyclic step by step decoding method used in discrete Fourier transform cyclic code of a communication system.
BACKGROUND OF THE INVENTION
Error control coding is one of efficient techniques for error control in many digital systems. In particular, the class of Reed-Solomon codes (RS code) has been widely used in reliable communication systems and data storage systems. An (n, k) RS code is encoding and decoding by using the arithmetic of Galois fields GF(P
m
). Since the minimum distance of the code is n−k+1, it is called a maximum-distance-separable code (MDS code). Although the RS has many important advantages; for example, it has high error correcting capability and can simultaneously correct random errors and multiple burst errors. However its code length is constrained to be p
m
−1 or a factor of p
m
−1, and each byte in a code word should be m bits (if p=2), besides any error bit caused by a low noise will be counted as an error of the whole byte. Discrete Fourier Transforms are playing on increasing implement role in many practical applications. There are same branches for investigation of the discrete transform; for example, as indicated by Marshall [1], the using of error control coding for discrete signals, and by Lin and Shiu [2], using DCT in Real-valued error control coding. However, the Wu-Shiu's code has not cyclic structure such that it cannot be encoded and decoded by using a step-by-step manner.
SUMMARY OF THE INVENTION
In this invention, a (N, N−d
min
+1) cyclic code is presented based on complex-valued discrete Fourier transform, the cyclic structure of the code makes the encoding and decoding procedures much easier than that of Marshall's and Wu-Shiu's codes. Since the code length N of the code can be any positive integer and each symbol in a code word is a complex value (consists of two real value), the code can be directly applied to analog communication systems and analog signal storage systems. Moreover, small amount of errors caused from low noise, computation truncating or rounding can be deleted by using a proper threshold for syndrome values. Finally, a (N, N−2) code is used as an example to illustrate the encoding and decoding procedures.
REFERENCES:
patent: 5293401 (1994-03-01), Serfaty
patent: 5774389 (1998-06-01), Iwamura
patent: 5948117 (1999-09-01), Weng et al.
Michael et al., A comparison of binary Quasi-Cyclic decoder implementations, 2000, IEEE, pp. 280-286.
Chu Hsien-Yu
Ko Pi-Chang
Lu Erl-Huei
Ting Yeun-Renn
Bacon & Thomas PLLC
Chaki Kakali
Chung-Shan Institute of Science & Technology
Do Chat
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