Cyclic redundancy data check encoding method and apparatus

Details Cyclic redundancy data check encoding method and apparatus Cyclic redundancy data check encoding method and apparatus

1979-08-06

1981-08-11

Malzahn, David H.

Excavating

G06F 1110

Patent

active

042837871

ABSTRACT:
A cyclic redundancy check word is customarily placed at the end of a data block, occupying one or more of the last bytes of the block. This can impose an undesirable restraint upon the person composing the data block, e.g. the editor of a teletext page. The invention allows the check word effectively to be embedded anywhere convenient in the block. A location in the block is selected (one or more bytes--preset address 16) and all preceding bytes are cyclically encoded (encoder 18) to yield a first check word. The succeeding bytes are subjected in reverse order to complementary encoding (encoder 28) to yield a second check word. A third check word is formed from the first and second check words (encoding logic 32) and inserted in the selected location. Each bit of the third word is the logical product of the corresponding bit of the first word and selected bits of the second word, such that when the bytes of the complete block, including the third word, are cyclically encoded, the final check word has the required final form, e.g. all zeroes, to indicate compliance of the block with the cyclic redundancy check. The location can be selected by the editor but is preferably selected automatically by a search for a free location complying with predetermined conditions.

REFERENCES:
patent: 3601800 (1971-08-01), Lee
patent: 4005405 (1977-01-01), West
patent: 4044329 (1977-08-01), Besenfelder et al.
patent: 4077565 (1978-03-01), Nibby, Jr. et al.
Chien, "Memory Error Control: Beyond Parity," IEEE Spectrum, Jul. 1973, pp. 18-23.
Oldham et al., "Cyclical Redundancy Check with a Nonself-Reciprocal Polynomial," IBM Technical Disclosure Bulletin, vol. 16, No. 11, Apr. 1974, pp. 3501-3503.

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