Cyclic buffer for infrared

Pulse or digital communications – Receivers – Particular pulse demodulator or detector

Reexamination Certificate

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Reexamination Certificate

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07006586

ABSTRACT:
An apparatus for receiving and processing an electrical signal in the form of a pulse train comprising a plurality of pulses. The apparatus generally comprises a processor, a memory and a timer. The timer may be configured to generate a respective value representative of the positions of each leading and trailing edge of each pulse in the pulse train. The memory may be configured to receive the value and write the value. The timer may be configured to generate an interrupt signal following receipt of the trailing edge of the last pulse in the pulse train and apply the interrupt signal to the processor. The processor may read the values stored in the memory for decoding the pulse train in response to said interrupt signal.

REFERENCES:
patent: 5325398 (1994-06-01), Murakami et al.
patent: 5870380 (1999-02-01), Diehl et al.
patent: 5971397 (1999-10-01), Miguel et al.
patent: 6367080 (2002-04-01), Enomoto et al.
patent: 6411397 (2002-06-01), Petteruti et al.
patent: 2004/0268136 (2004-12-01), Mitsuishi
patent: 0525667 (1993-03-01), None

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