Cycle simulation method, cycle simulator, and computer product

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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Reexamination Certificate

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07729896

ABSTRACT:
It is determined whether an i-th instruction is for a memory access. If the i-th instruction is the memory access, it is determined whether an address to access according to the i-th instruction coincides with an address that has been accessed by a first execution block. If the addresses coincide with each other, it is determined whether a cycle of a second execution block currently executing precedes that of the first execution block. If the cycle of the second execution block precedes that of the first executing block, a memory model is accessed. A necessary number of cycles for execution of a j-th instruction is added to the current number of cycles, and the address, a cycle, data, and a data size at the time of the current access (before re-writing) are written in a delay table.

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