Cycle interleaving during burst mode operation

Details Cycle interleaving during burst mode operation Cycle interleaving during burst mode operation

1974-07-15

1976-06-01

Nusbaum, Mark E.

Communications: electrical

Digital comparator systems

G06F 300

Patent

active

039613127

ABSTRACT:
Control circuitry in a computer system is responsive to an allow cycle steal signal from an I/O attachment operating in a burst or dedicated data transfer mode and generates control signals whereby the next data storage cycle is made available to an I/O device which is also capable of operating in a cycle steal mode. Upon completion of the next storage cycle, the operation reverts to burst mode and the I/O attachment operating in the burst mode is granted ensuing data storage cycles until it relinquishes a storage cycle to an I/O device capable of using and having a need for it.

REFERENCES:
patent: 3500466 (1970-03-01), Carleton
patent: 3599176 (1971-08-01), Cordero et al.
patent: 3668651 (1972-06-01), Hornung
patent: 3680054 (1972-07-01), Bunker et al.
patent: 3735357 (1973-05-01), Maholick et al.
patent: 3749845 (1973-07-01), Fraser
patent: 3810114 (1974-05-01), Yamada et al.

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