Cutting CAM peak power by clock regioning

Details Cutting CAM peak power by clock regioning Cutting CAM peak power by clock regioning

2005-02-15

2005-02-15

Tran, Andrew Q. (Department: 2824)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S189070, C365S230030, C365S233100, C365S194000, C713S154000

Reexamination Certificate

active

06856529

ABSTRACT:
A CAM device architecture where CAM cells are divided into at least two arrays and each array is operated in a different clock domain so that at no time are the arrays simultaneously drawing maximum power. By dividing the CAM array into a plurality of arrays and staggering the search operation so that every array does not simultaneously draw maximum power, the peak power consumption of the CAM device is reduced.

REFERENCES:
patent: 6747885 (2004-06-01), Park
patent: 6751111 (2004-06-01), Foss et al.
patent: 6785153 (2004-08-01), Regev et al.

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