Current switching sensor detector

Static information storage and retrieval – Associative memories – Ferroelectric cell

Reexamination Certificate

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Details

C365S204000, C327S051000, C327S052000, C327S053000, C327S054000, C327S055000, C327S056000, C327S057000, C327S063000

Reexamination Certificate

active

06775165

ABSTRACT:

FIELD OF INVENTION
The present invention relates to sensing a logic state using a sensor or detector. More specifically, the present invention relates to a current sensing architecture for detecting a logic state.
BACKGROUND OF THE INVENTION
One way to detect the logic state of a switching device is to couple the device between a power source and ground and measuring the resulting voltage. For example, in
FIG. 1A
, power is applied at terminal
101
, which is coupled in series with a resistor
102
and a switching device
104
to a ground
105
. The switching device
104
may be a single switching device, such as a transistor, or a more complex device, such as a series of switching devices which form a logic circuit having a logic output. The logic state of the switching device
104
may be determined by measuring the voltage at terminal
103
. If the voltage at terminal
103
is relatively high, then the switching device
104
is in a open state. Similarly, if the voltage at terminal
103
is relatively low, then the switching device
104
is in a closed state. The change in voltage at terminal
103
is related to the current flow rate through the switching device. Thus, the voltage sensing at terminal
103
should be performed only after the sufficient time has elapsed for the voltage to become stable after a state change in the switching device
104
.
An issue which arises when using a circuit such as illustrated in
FIG. 1A
in a semiconductor device is that of parasitic capacitance. Parasitic capacitance is a unwanted capacitance resulting from the fabrication of the semiconductor device and is typically associated with conductive lines.
FIG. 1B
illustrates a circuit equivalent to that illustrated in
FIG. 1A
, but with the parasitic capacitance illustrated explicitly illustrated as capacitor
106
coupled in parallel to the switching device
104
in-between resistor
102
and ground
105
. The effect of parasitic capacitance is to reduce the rate a voltage at node
103
changes over time as the switching device
104
switches states. For example, if the switching device
104
were open and then switched to a close position, the voltage a node
103
in
FIG. 1B
would fall towards its new value at a slower rate than if the parasitic capacitance
106
were not present. Parasitic capacitance, therefore, increases the time required to detect a changed state of the switching device
104
.
One method for compensating the reduced switching speed imposed by parasitic capacitance is to provide increased current flow through the circuit. Increasing the maximum current flow through the switching device
104
discharges the charge stored by the parasitic capacitance faster when switch
104
is closed and changes capacitor
106
faster when switch
104
is opened. Thus, increasing the maximum current flow throughout the circuit permits the voltage at node
103
to reach a stable state faster after the switching device
104
has changed its logical state. Unfortunately, increasing the maximum current flow also increases the power consumption of the circuit. Accordingly, there is a need and desire for a method and apparatus to quickly and efficiently detect a logic state of a device in an environment having significant parasitic capacitance.
SUMMARY OF THE INVENTION
The present invention is directed to an apparatus and method for quickly and efficiently detecting a logic state of a switching device. The present invention incorporates a series circuit coupling a power supply source to ground through a current sensing amplifier, at least one current limiter, a voltage regulator, and the switching device. A current limiter control circuit is coupled to the at least one current limiter. In an alternate embodiment, two current limiters are used in the series circuit. The current sensing amplifier measures the current flowing through the switching device and does not need to wait for charge stored by the parasitic capacitance to charge or discharge before sensing a logic level change. Thus, the present invention is not slowed by parasitic capacitance and does not require increased current flow to compensate for the parasitic capacitance.


REFERENCES:
patent: 5260643 (1993-11-01), Sandhu

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