Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
1999-03-19
2001-04-17
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S081000, C327S088000, C341S136000
Reexamination Certificate
active
06218871
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to electronics, and more particularly, to a current-switching method and circuit for digital-to-analog converters (DACs) with improved compliance and linearity in the output current.
2. Description of Related Art
Most conventional DACs are constructed based on a current-switching architecture. Earlier current-switching circuits are designed to operate at 5 V (i.e., the high-voltage logic state of the digital input is 5 V). However, today's digital systems are typically designed to operate at 3.3 V or 3 V. Therefore, when a conventional 5 V current-switching circuit is used on a 3 V digital system, it would not meet the required 1.2 V compliance and high linearity in the output current characteristic. Two such conventional current-switching circuits are illustratively depicted in the following with reference to
FIGS. 1 and 2
respectively.
FIG. 1
is a schematic circuit diagram of a first conventional current-switching circuit for DAC. As shown, this current-switching circuit is composed of three MOS transistors M
1
, M
2
, M
3
. The first MOS transistor M
1
serves as a fixed current source. The second MOS transistor M
2
has a gate G
2
connected to receive a first digital input DIN, while the third MOS transistor M
3
has a gate G
3
connected to receive a second digital input DINB. Whether the output port T
IOUT
of the current-switching circuit outputs current or not is dependent on the logic combination of the first and second digital inputs DIN, DINB, This current-switching circuit can operate at 3 V (V
CC
=3V) and therefore can be used in conjunction with a 3 V digital system.
One drawback to the foregoing current-switching circuit, however, is that during the switching of the first and second digital inputs DIN, DINB from one logic sate to the other (either from low to high or from high to low), there exists a short period in which both of the two MOS transistors M
2
, M
3
are switched simultaneously to the OFF state, thus leading to the undesired occurrence of a current spike in the output current IOUT. One solution to this problem is to incorporate buffer means (not shown) to the current-switching circuit. To do this, however, the overall chip size to implement the current-switching circuit will be increased.
Still one drawback to the foregoing current-switching circuit is that the linearity in the output current characteristic is poor due to the reason that MOS transistor M
3
, which operates in the triode region, is used at the output port of the current-switching circuit to provide the 1.2 V output compliance, which is insufficient to provide a high enough output impedance at the output port of the current-switching circuit. Therefore, the linearity in the output current characteristic is still unsatisfactory.
Another solution to the problem of the simultaneous switching-off of the two MOS transistors M
2
, M
3
in the circuit of
FIG. 1
is shown in FIG.
2
. The current-switching circuit of
FIG. 2
is substantially identical in circuit structure as the one shown in
FIG. 1
, except that the input to the gate G
3
of the third MOS transistor M
3
is here a fixed reference voltage VREF instead of the digital input DINB. This modification can help prevent the two MOS transistors M
2
, M
3
from being simultaneously switched to the OFF state. However, the linearity in the output current characteristic is nonetheless unsatisfactory.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a current-switching method and circuit for DAC, which allows the output current to have better compliance and linearity as compared to the prior art.
It is another objective of the present invention to provide a current-switching method and circuit for DAC, which can meet the requirements of 3 V working voltage and 1.2 V output compliance and can meet the requirement of 10 bits linearity.
In accordance with the foregoing and other objectives of the present invention, an improved current-switching method and circuit is provided.
The current-switching circuit of the invention includes: a fixed current source for supplying a fixed current, a first MOS transistor, a second MOS transistor and a third MOS transistor. The first MOS transistor has a gate connected to receive the input digital signal and two source/drain ends, one of which is connected to the output end of the fixed current source and the other is connected to a first logic voltage point. The second MOS transistor has a gate connected to receive a fixed reference voltage whose magnitude is set between the logic-high and logic-low voltage states of the input digital signal, and two source/drain ends, one of which is connected to the output end of the fixed current source and the other is connected to a node. The third MOS transistor has a gate connected to a fixed voltage that sets the third MOS transistor at a permanently-ON state, and two source/drain ends, one of which is connected to the node connected to the second MOS transistor and the other serves as the output port of the current-switching circuit.
The method of the invention includes providing a fixed current source. A first MOS transistor is provided, wherein a gate thereof is connected to receive the input digital signal, with one of the source/drain ends thereof being connected to the output end of the fixed current source and the other being connected to a fixed voltage point. A second MOS transistor is provided, wherein a gate thereof is connected to receive a fixed reference voltage whose magnitude is set between the high-voltage and low-voltage logic states of the input digital signal, with one of the source/drain ends thereof being connected to the output end of the fixed current source and the other being connected to a node. A third MOS transistor is provided, wherein a gate thereof is connected to the first voltage point, with one of the source/drain ends thereof being connected to the node connected to one of the source/drain ends of the second MOS transistor other than that connected to the output end of the fixed current source, and the other one of the source/drain ends being connected to the output port of the current-switching circuit.
In the current-switching circuit, the third MOS transistor that is set to a permanently-on state is connected at the output port of the current-switching circuit, which can help increase the output impedance of the current-switching circuit. Moreover, the problem of simultaneous switching-off of two control transistors, which consists of the first MOS transistor and the second MOS transistor, can be eliminated by connecting the gate of the second MOS transistor to the reference voltage. The current-switching method and circuit can therefore meet the requirements of 3 V working voltage with 1.2 V output compliance and the requirements of 10 bits linearity in the output current characteristic.
REFERENCES:
patent: 5023614 (1991-06-01), Fung et al.
patent: 5148065 (1992-09-01), Krenik et al.
patent: 5331322 (1994-07-01), Cha et al.
patent: 5905452 (1999-05-01), Back
patent: 5909187 (1999-06-01), Ahuja
Huang Jiawei
J C Patents
Lam Tuan T.
Winbond Electronics Corp.
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