Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2001-11-21
2003-05-06
Jeanpierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C327S108000
Reexamination Certificate
active
06559784
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a current switching cell for a multi-cell digital to analog converter and more particularly to such a cell which is locally rather than globally controlled.
BACKGROUND OF THE INVENTION
Digital to analog converters (DAC's) employ a number of current switching cells to convert the digital inputs to analog outputs. Typically, one or more common or global lines operate the current circuits in each cell to provide a defined current to their respective current switches and another global line operates the driver circuit in each cell causing it, in response to a data input, to produce an analog output from the defined current from the current circuit. Operating these cells globally has some advantages but the common connection of these global control lines to all of the cells causes disturbance signals which result in distortion of the DAC analog output: the parasitic coupling, primarily capacitance, associated with the elements of the various circuits in each cell establish paths whereby disturbances in one circuit are propagated to others. At high frequency switching speeds the interference introduced by these disturbances not only propagates through other cells but extends in time to distort subsequent outputs of the DAC referred to as intersymbol interference. One approach to the problem has been to increase the current circuit output impedance but this results in reducing the “headroom”, i.e., the amount of voltage supply to maintain the circuits in saturation.
BRIEF SUMMARY OF THE INVENTION
It is therefore an object of this invention to provide an improved current switching cell for a DAC.
It is a further object of this invention to provide such an improved current switching cell for a DAC which isolates transient disturbances and prevents them from propagating from one cell to another.
It is a further object of this invention to provide such an improved current switching cell for a DAC which reduces intersymbol interference.
It is a further object of this invention to provide such an improved current switching cell for a DAC which dramatically increases the impedance of the current circuit without decreasing the headroom.
This invention results from the realization that an improved current switching cell for a DAC which prevents propagation of disturbances of parasitic capacitance or other parasitic couplings which distort the DAC output and cause intersymbol interference can be achieved by isolating the parasitic couplings from the common or global control lines to the current circuit and driver circuit of each cell so that the disturbances can not pass from one cell to another.
This invention features a current switching cell for a multi-cell DAC, each cell having a data input and an analog output. There is a current switching circuit having a current node and a current definition circuit for providing current to the current switching circuit at the current node. The current definition circuit has a parasitic coupling between its input and the current node. A driver circuit responsive to a data input, actuates the current switching circuit to provide an analog output from the current definition circuit. A control circuit responds to at least one common control signal for controlling the current definition circuit and isolating the parasitic coupling between the current node and the common control signal.
In the preferred embodiment the current switching circuit may include a differential current switching circuit. The current definition circuit may include a current source and the current source may be connected to the current node. The differential switching circuit may include FET's and the current node may be a common source current node. The current definition circuit may include a cascode circuit in series with the current source and the cascode circuit may be connected to the current node. The parasitic coupling may include a parasitic capacitance. The cascode circuit may include an active cascode circuit. The control circuit may define the current supplied by the current source and the impedance of the current definition circuit. The control circuit may include a buffer amplifier. The current switching circuit, current definition circuit, driver circuit, and control circuit may be implemented with FET's. The control circuit may be responsive to two common control signals, a first common control signal which defines the current supplied by the current source, and a second common control signal which operates the cascode circuit to multiply the impedance of the current source.
The invention also features a current switching cell for a multi-cell DAC each cell of which has a digital input and analog output. There is a current switching circuit having a current node and a current definition circuit providing current to the current switching circuit at the current node. A driver circuit responds to a data input to provide a driver input to the current switching circuit to enable it to produce an analog output from the current from the current definition circuit. The driver circuit has a parasitic coupling between its driver input and the current node. A control circuit responsive to a common control signal controls the driver circuit and isolates the parasitic coupling between the current node and the driver input.
In a preferred embodiment the parasitic coupling may include a parasitic capacitance.
REFERENCES:
patent: 4761636 (1988-08-01), Brokaw et al.
patent: 5638011 (1997-06-01), Nguyen
patent: 5703519 (1997-12-01), Crook et al.
patent: 6377504 (2002-04-01), Hilbert
Mercer Douglas A.
Schofield William G. J.
Analog Devices Inc.
Iandiorio & Teska
Jeanpierre Peguy
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