Current switched Josephson junction memory and logic circuits

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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Details

307212, 307277, H03K 1995

Patent

active

040513939

ABSTRACT:
A superconductive circuit includes a loop circuit having first and second parallel branches connected in parallel with an appropriately terminated fan-out line. Each branch includes a Josephson junction device and the loop circuit includes at least one resistor. A bias current is applied directly to the loop circuit so that each Josephson device is biased below its critical current I.sub.J. A control current is then coupled (directly or inductively) to the loop circuit so that in one branch the bias and control currents add and exceed I.sub.J. The Josephson device in that branch switches from V = 0 to V = 2.DELTA. causing substantially the entire bias current to flow through the other branch and thereby switching the other Josephson device to V = 2.DELTA.. Now substantially all the bias current is diverted to the fan-out line which can be used to control other similar circuits, i.e., to provide either the control or bias current for other circuits. Logic is performed by using multiple control currents coupled to the loop circuit, a resistor in the fan-out line and preferably resistors in each branch. Memory is achieved by forming a totally superconductive closed circuit path including the fan-out line and a portion of the loop circuit.

REFERENCES:
patent: 3281609 (1966-10-01), Rowell
patent: 3363200 (1968-01-01), Jaklevic et al.
patent: 3758795 (1973-09-01), Anacker et al.
patent: 3825906 (1974-07-01), Hamel
patent: 3949395 (1976-04-01), Klein
patent: 3953749 (1976-04-01), Baechtold et al.
Cryogenics Feb., 1976, pp. 81-88, "An Inductively Coupled Memory Cell for NDRO with Two Josephson Junctions", by W. Jutzi.

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