Current surge elimination for CMOS devices

Details Current surge elimination for CMOS devices Current surge elimination for CMOS devices

1987-03-19

1989-03-21

Fears, Terrell W.

Static information storage and retrieval

Addressing

Sync/clocking

365189, 365229, G11C 1300

Patent

active

048150410

ABSTRACT:
A possible surge current which can develop during power initialization of CMOS circuit arrangements or at other instances, because of loss of an actual clock signal, is eliminated by controllably supplying an alternate clock signal to the CMOS devices in the circuit during intervals in which the actual clock signal is absent. The presence or absence of the actual clock signal is monitored continuously and when present, the actual clock signal is controllably supplied to the CMOS devices in place of the alternate clock signal.

REFERENCES:
patent: 3778784 (1973-12-01), Karp et al.
patent: 4627032 (1986-12-01), Kolwicz et al.

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